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february 2011 doc id 13778 rev 3 1/23 AN2603 application note st1s09 high efficiency synchronous buck converter introduction the st1s09 family of synchronous step-down dc-dc converters is optimized for powering all low-voltage applications and, generally, to replaces high current linear solutions when power dissipation may cause high heating of the application environment. it provides up to 2 a over an input voltage range of 2.7 v to 5.5 v. a high 1.5 mhz switching frequency allows th e use of tiny surface-mount components, and in addition to the resistor divider to set the output voltage value, an inductor and two capacitors are required. a low output ripple is guaranteed by the current mode pwm topology and by the use of low esr surface-mount ceramic capacitors. the device is available in two versions: the st1s09 with power good function and the st1s09i with an inhibit function. the device is thermally protected and current limited to prevent damage due to accidental short circuit. the st1s09 family is availa ble in the dfn6 3x3 package. figure 1. simplified schematic note: 1 available only for the st1s09i 2 available only for the st1s09 www.st.com
contents AN2603 2/23 doc id 13778 rev 3 contents 1 st1s09 description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 1.1 inhibit function (st1s09i only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 power good function (st1s09 only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.3 over voltage protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 1.4 short circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 2 selecting components for the appl ication . . . . . . . . . . . . . . . . . . . . . . 10 2.1 input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 2.2 output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 2.3 inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 recommendations on board usage . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 4.1 external component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4.1.1 inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1.2 capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5 typical performance characteristi cs . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 6 bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 8 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
AN2603 list of figures doc id 13778 rev 3 3/23 list of figures figure 1. simplified schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. inductor current at light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 figure 3. output voltage ripple at light load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 4. inductor current in pwm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 figure 5. output voltage ripple in pwm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 6. inrush current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 7. power good block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 figure 8. power good . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 9. st1s09 board illustration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 10. board layers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 11. st1s09 application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 12. st1s09i application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 13. layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 14. feedback voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 15. output voltage vs. input voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 16. over voltage protection vs. temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 17. inhibit voltage vs. temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 18. efficiency vs. output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 19. efficiency vs. output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 figure 20. efficiency vs. inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 21. dfn6 3x3 recommended footprint . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
st1s09 description AN2603 4/23 doc id 13778 rev 3 1 st1s09 description the st1s09 is a family of adjustable current mode pwm synchronous step-down dc-dc converters with internal 2 a power switch. it is a complete 2 a switching regulator with internal compensation which eliminates the need for additional components. the st1s09 devices operate at a fixed frequency of 1.5 mhz (typ). to maintain good efficiency, the device operates in power-save mode at light load condition ( figure 2 and figure 3 ). when the load increases it auto matically switches to pwm (pulse width modulation) mode, in order to reduce the output voltage ripple ( figure 4 and figure 5 ). figure 2. inductor current at light load (v in =5 v, v out =1.2 v, i out =100 ma, ch1=sw, ch4=i l )
AN2603 st1s09 description doc id 13778 rev 3 5/23 figure 3. output voltage ripple at light load figure 4. inductor current in pwm v out (ac) sw (v in =5 v, v out =1.2 v, ch1=sw, ch2=v out r load =12.2 (v in =5 v, v out =1.2 v, ch4=i l ) i out =250 ma, ch1=sw,
st1s09 description AN2603 6/23 doc id 13778 rev 3 figure 5. output voltage ripple in pwm to clamp the error amplifier reference voltage, a soft start control block generating a voltage ramp is implemented. when switching on the power supply, it allows control of the inrush current value ( figure 6 ). when the input voltage is below 3.7 v (typ.), the under-voltage lock out maintains the st1s09 in shut down (this function is not available in the st1s09i). other protection circuits in the device are: the thermal shut down block which turns off the regulator when the junction temperature exceeds 150c, and the cycle-by-cycle current limiting that provides protection against shorted outputs. figure 6. inrush current as an adjustable regulator, the output voltage of the st1s09 is determined by an external resistor divider. the desired value is given by the following equation: vout(ac) sw (v in =5 v, v out =1.2 v, ch2=v out ) r load =0.66 , ch1=sw, v out sw iin (v in =5 v, v out =3.3 v, i out =2 a, ch4=iin) ch2=v out , ch3=sw,
AN2603 st1s09 description doc id 13778 rev 3 7/23 equation 1 few components are required for operation of the device: an inductor, two capacitors and the resistor divider. the chosen inductor must be capable of withstanding peak current level without saturating. the inductor value can be selected taking into consideration that a large inductor value increases the efficiency at low output current and reduces output voltage ripple, while a smaller inductor can be chosen when it is important to reduce package size and total application cost. moreover, the st1s09 family has been designed to function properly with x5r or x7r smd ceramic capacitors both at the input and at the output. this type of capacitor minimizes the output voltage ripple, thanks to its very low series resistance (esr). other low esr capacitors can be used based on application requirements without compromising the correct functioning of the device. due to the high switching frequency and peak current, it is important to optimize the application environment by reducing the length of the pcb traces and placing all external components in close proximity to the device. 1.1 inhibit function (st1s09i only) the st1s09i features an inhibit function (pin6). when the inh voltage is higher than 1.3 v the device is on, and if it is lower than 0.4 v the device is off. in shutdown mode, consumption is lower than 1 a. the inh pin does not have an internal pull-up , which means that the inhibit pin cannot be left floating. if inhibit function is not used, the inh pin must be connected to v in . 1.2 power good function (st1s09 only) most odd applications require a flag showing that the output voltage is in the correct range. the power good threshold depends on the feedback voltage. when the feedback is higher than 0.92* v fb , the power good (pg) pin goes to high impedance. if the feedback is below 0.92*v fb the pg pin goes in low impedance. if the device is working well, v fb is higher than 0.736 v (pg threshold, 0.92* 0.8 v) and the power good pin is at high impedance. figure 7. power good block diagram v out v fb 1 r1 r2 ------- - + ? = fb pg + - 0.92*vref
st1s09 description AN2603 8/23 doc id 13778 rev 3 if the output voltage is fixed using an external or internal resistor divider, the power good threshold is 0.92*v out . the use of the power good function requires an external pull-up resistor, which must be connected between the pg pin and v in or v out . the typical current ca pability of the pg pin is up to 6 ma. the use of a pull-up resistor for pg in the range of 100 k to 1 m is recommended. if the power good function is not used, the pg pin must remain floating in the board. in the application board, r3 is used to pull up the pg pin to v in and r4 to pull up the pg pin to v out . the power good pin can be connected only to v in or v out . figure 8. power good 1.3 over voltage protection when output voltage is over 10% of the nominal value, a small nmos is turned on to discharge the output. the limitation of the clamping current is about 300 ma. when the output voltage drops below 1.05*v out , the device returns to normal closed loop switching operation. pg v out (v in =5 v, v out =3.18 v, r3=120 k ch1=pg, ch3=v out )
AN2603 st1s09 description doc id 13778 rev 3 9/23 1.4 short circuit protection in over-current protection mode, when the peak current reaches the current limit, the device reduces the t on down to its minimum value. in these conditions, the duty cycle is strongly reduced and, in most applications, this is enough to limit the current to i lim . in cases of heavy short circuit at the output (v out = 0 v) and depending on the application conditions (v in value and parasitic effect of external components) the current peak could reach values higher than i lim . this can be understood by considering the inductor current ripple during the on and off phases: on phase equation 2 off phase equation 3 where v d is the voltage drop across the internal ndmos and dcr l is the series resistance of the inductor. in short-circuit conditions v out is negligible. so, during the t off , the voltage applied to the inductor is very sm all and it is possible that the current ripple in this phase will not compensate for the current ripple during the t on . the maximum current peak can be easily measured through the inductor with v out = 0 v (short-circuit) and v in = v inmax . if the application is required to sustain the short-circuit condition for an extended period, the external components (mainly the inductor) must be selected based on this value. i l v in v out ? dcr l i ? ? l ---------------------------------------------------------- t on ? = i l v d v out dcr l i ? ++ l --------------------------------------------------------- t off ? =
selecting components for the application AN2603 10/23 doc id 13778 rev 3 2 selecting components for the application this section provides information to assist in the selection of the most appropriate components for the intended application. 2.1 input capacitor the input capacitor must be able to support the maximum input operating voltage and the maximum rms input current. since step-down converters draw current from the input in pulses, the input current is squared and the height of each pulse is equal to the output current. the input capacitor has to absorb switching current that can be as high as the load current divided by two (in the worst case, wit h a duty cycle of 50%). for this reason, the quality of these capacitors must be very high to minimize the power dissipation generated by the internal esr, thus improving system reliability and efficiency. the critical parameter is usually the rms current rating, which must be higher than the rms input current. the maximum rms input current (flowing through the input capacitor) is: equation 4 where is the expected system efficiency, d is the duty cycle and i out the output dc current. this function reaches its maximum value at d = 0.5 and the equivalent rms current is equal to i out divided by 2 (considering = 1). the maximum and minimum duty cycles are: equation 5 and equation 6 where v f it is the voltage drop across the internal nmos and v sw the voltage drop across the internal pmos. considering the range d min to d max it is possible to determine the maximum i rms flowing through the input capacitor. capacitors to consider are: ceramic capacitors. these capacitors usually have a high rms current rating for a given physical dimension (due to the very lo w esr). the drawback is the substantially higher cost for larger value capacitors. electrolytic capacitors. very good tantalum capacitors are becoming available, featuring very low esr and small size. however they are subject to thermal damage if subjected to very high current during charge . so, it is better to avoid this type of capacitor for the input filter of the device. aluminum capacitors are not the best choice due to their high esr. i rms i out d 2d 2 ? -------------- - ? d 2 ------ - + ? = d max v out v f + v inmin v sw ? ------------------------------------ - = d min v out v f + v inmax v sw ? -------------------------------------- =
AN2603 selecting components for the application doc id 13778 rev 3 11/23 2.2 output capacitor the output capacitor is very important to satisfy the output voltage ripple requirement. using a small inductor value is useful to reduce the size of the coil, but this increases the current ripple. therefore, to reduce the output voltage ripple a low esr capacitor is required. the output voltage ripple (v out_ripple ), in continuous mode, is: equation 7 where i is the ripple current and f sw is the switching frequency. 2.3 inductor the inductor value is very important because it fixes the ripple current flowing through output capacitor. the ripple current is usually fixed at 20-40% of i out_max , which is 0.4-0.8 a with i out_max = 2 a. the approximate inductor value is obtained using the following formula: equation 8 where t on is the on time of the internal switch, given by d t. for example, with v out = 3.3 v, v in = 5 v and i out = 0.45 a, the inductor value is around 2.8 h. the peak current thought the inductor is given by: equation 9 it can be observed that if the inductor value decreases, the peak current (which must be lower than the current limit of the device) increases. so, for fixed peak current protection, a higher value of the inductor permits a higher value for the output current. v out1ripple iers 1 8c out f sw ?? -------------------------------------- - + ?? ?? ? = l v in v out ? i ----------------------------- - t on ? = i pk i out i 2 ----- + =
thermal considerations AN2603 12/23 doc id 13778 rev 3 3 thermal considerations the dissipated power of the device is determined by three separate factors: switching losses due to the r ds(on) . these are equal to: equation 10 and equation 11 where d is the duty cycle of the application. note: the duty cycle is theoretically given by the ratio between v out and v in , but in practice it is significantly higher than this value to compensate for the losses of the overall application. for this reason, the switchin g losses related to the r ds(on) increase compared to an ideal case. on and off switching losses. these are given by the following relation: equation 12 where t on and t off are the overlap times of the voltage across the power switch and the current flowing into it during the turn on and turn off phases. t sw is the equivalent switching time. quiescent current losses: equation 13 where i q is the quiescent current. example: v in = 5 v, v out = 3.3 v, i out = 1.5 a the r ds(on) has a typical value of 0.12 @ 25 c and increases up to a maximum value of 0.16 @ 150 c. considering a value of 0.15 , t sw is approximately 20 ns and i q has a typical value of 1.5 ma @ v in = 5 v. the overall losses are: equation 14 the junction temperatur e of the device will be: equation 15 where t a is the ambient temperature and rth j-a is the junction to ambient thermal resistance. p on p r dson p i 2 out d ?? = p on n r dson n i 2 out 1d ? () ?? = p sw v in i out t on t off + () 2 ----------------------------------- - f sw v in i out t sw f sw ??? = ?? ? = p q v in i q ? = p tot r dson p i 2 out dr dson n i 2 out 1d ? () v in i out t sw f sw v in i q = ? + ??? + ?? + ?? = 0.15 1.5 2 0.73 0.12 1.5 2 10.73 ? () 51.52010 9 ? 1.5 10 6 51.510 3 ? 0.552w ? ?? + ??? ?? + ?? + ?? = t j t a rth ja ? p tot ? + =
AN2603 thermal considerations doc id 13778 rev 3 13/23 considering that the device, mounted on the board with a good ground plane, has a thermal resistance junction to ambient (rth j-a ) of about 55c/w and considering an ambient temperature of about 85c, the junction temperature is: equation 16 t j 85 0.552 55 115 c = ? + =
recommendations on board usage AN2603 14/23 doc id 13778 rev 3 4 recommendations on board usage the board shown in figure 9 is provided with kelvin connection, which means that two lines are available for each pin, one used for supplying or sinking current and the other used to perform the necessary measurements. the st1s09 inhibit pin does not have an internal pull up, meaning that the inhibit pin cannot be left floating. figure 9. st1s09 board illustration figure 10. board layers the board has two available inhibit pins. one is located on the right side of the board and allows a connection to gnd or v in , via a jumper, to turn the device off or on. the other inhibit pin, located on the top left of the board, can be used to supply an external voltage greater than 1.3 v to turn on the device, or lower than 0.4 v to turn off the device. top layer bottom layer
AN2603 recommendations on board usage doc id 13778 rev 3 15/23 4.1 external component selection figure 11 and figure 12 show the typical application schematics. figure 11. st1s09 application schematic figure 12. st1s09i application schematic in order to obtain the needed output voltage, the resistor divider must be selected in accordance with the following formula: equation 17 table 1. recommended resistor divider v out r1 r2 1.2 v 27 k 47 k 3.3 v 47 k 15 k vfb sw gnd vin_a vin_sw st1s09 21 5 4 3 r1 r2 l1 vout c2 6 pg c1 r3 gnd vin vfb sw gnd vin_a vin_sw st1s09i 21 6 5 4 3 vinh l1 vout c2 r1 r2 c1 off on vin gnd v out v fb 1 r1 r2 ------- - + ? = with v fb 0.8v =
recommendations on board usage AN2603 16/23 doc id 13778 rev 3 the resistors in ta b l e 1 provide a suitable compromise in terms of current consumption and minimum output voltage. for output voltages close to the feedback voltage, we suggest to add a very small capacitor in parallel with r1 in the range of 10 pf. or, as an alternative, we suggest to increase the current in the resistor divider by decreasing the r1 and r2 value. 4.1.1 inductor selection due to the high frequency (1.5 mhz) it is possible to use very small inductor values. in this board the device was tested with inductors in the range of 1 h to 10 h, with very good efficiency results (see below plot). as the device is able to provide an operative output current of 2 a, the use of inductors capable of managing at least 3 a is strongly recommended. 4.1.2 capacitor selection it is possible to use any x5r or x7r ceramic capacitor: c1 = 4.7 f (ceramic) or higher. c2 = 22 f (ceramic) or higher. it is poss ible to put several capacitors in parallel in order to reduce the equivalent series resistance and improve the ripple present in the output voltage. 4.2 layout considerations due to the high switching frequency and peak current, the layout is an important design step for all switching power supplies. if the layout is not done carefully, important parameters such as efficiency and output voltage ripple could be compromised. short, wide traces must be implemented for main current and for power ground paths as showed in bold in figure 13 . the input capacitor must be plac ed as close as possible to the device pins as well as the inductor and output capacitor. it is very important to connect the two input pins 4 mm far from the device, it avoids noise inside the control circuit, coming from the power switch, as shown in figure 9 . a common ground node minimizes ground noise, as shown in figure 13 . the exposed pad of the package must be connected to common ground node. figure 13. layout considerations vfb sw vin_a vin_sw st1s09 1 5 4 3 r1 r2 l1 vout c2 6 c1 gnd vin 2 gnd
AN2603 typical performance characteristics doc id 13778 rev 3 17/23 5 typical performance characteristics figure 14. feedback voltage vs. temperature figure 15. output voltage vs. input voltage figure 16. over voltage protection vs. temperature 760 770 780 790 800 810 820 830 840 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] vfb [mv] vin=5v , iout=10ma, l=3.3h, c1=4.7f, c2=22f, vout=1.2v 0.00 0.20 0.40 0.60 0.80 1.00 1.20 1.40 0123456 vin [v] vout [v] st1s09i st1s09 vin = vinh= from 0 to 5.5v , iout=2a ,l=3.3h, c1=4.7f, c2=22f, vout=1.2v 0.78 0.79 0.8 0.81 0.82 0.83 0.84 0.85 0.86 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] ovp [v] ovp on ovp off v in=5v, c1=4.7f, c2=22f, vout=1.2v
typical performance characteristics AN2603 18/23 doc id 13778 rev 3 figure 17. inhibit voltage vs. temperature figure 18. efficiency vs. output current figure 19. efficiency vs. output voltage 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 -75 -50 -25 0 25 50 75 100 125 150 175 t [c] vinh [v] on off vin=5v ,vinh from 0 to 2v, iout=from 10ma to 2a, l=3.3h, cin=4.7f, cout=22f 25 35 45 55 65 75 85 95 0 500 1000 1500 2000 iout [ma] efficiency [%] vout=1.2v vout=2.5v vout=3.3v vin=5v , l=3.3h, cin=4.7f, cout=22f 50 55 60 65 70 75 80 85 90 95 100 0.511.522.533.54 vout [v] efficiency [%] iout=500ma iou t=1a vin=5v , l=3.3h, cin=4.7f, cout=22f
AN2603 typical performance characteristics doc id 13778 rev 3 19/23 figure 20. efficiency vs. inductor 50 55 60 65 70 75 80 85 90 95 100 0246810 l [h] efficiency [%] iout=500ma iou t=1a iou t=1.5a iou t=2a vin=5v, vout=3.3v, cin=4.7f, cout=22f
bill of materials AN2603 20/23 doc id 13778 rev 3 6 bill of materials table 2. bom with most common components name value material manufacturer part number c1 4.7 f ceramic murata grm21br61e475ka12b ceramic tdk c3216x7r1c475k c2 22 f ceramic murata grm32er61e226ke15b ceramic tdk c3225x7r1c226m c3 not mounted d not mounted l1 3.3 h tdk rlf7030t-3r3m4r1 4.7 h coiltronics dr73-4r7 r3/r4 120 k
AN2603 recommended footprint doc id 13778 rev 3 21/23 7 recommended footprint figure 21. dfn6 3x3 recommended footprint
revision history AN2603 22/23 doc id 13778 rev 3 8 revision history table 3. document revision history date revision changes 17-sep-2007 1 initial release 29-oct-2008 2 modified: section 1.2 and 4.2 23-feb-2011 3 modified: table 2 on page 20
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